1. Field of the Invention
The invention relates to a multifunction peripheral apparatus, an external controller for such an apparatus, and their control method. More particularly, the invention relates to a multifunction peripheral apparatus (hereinafter, referred to as an MFP) having a copy function, a printer function, a scanner function, and the like.
2. Related Background Art
FIG. 2 shows a conventional example in a technical field to which the invention belongs.
Reference numeral 1 denotes an MFP controller; 2 a scanner; and 3 a printer. The MFP having the scanner function, printer function, copy function, and the like is constructed by those component elements.
In the case where processing ability of a PDL print is not enough if only the MFP controller 1 is used, a PDL accelerator 6 is connected to the outside via a PCI bus 4. A PDL is analyzed by the external PDL accelerator and developed into bit map data. The developed bit map data is returned to the MFP controller 1, thereby realizing the high-speed PDL print.
FIGS. 3, 4, 5, and 6 show details of a conventional example of a B/W MFP.
First, a processing flow for an electronic sorter of the copy in the conventional example will be explained with reference to FIG. 4.
When the copying operation is executed in a UI (user interface unit) 118, a copy job is sent to a CPU 104 via a UIcont 117, the PCI bus 4, a PCIcont 112, an I/O bus 106, and a bus SW (bus switch) 103 (S401).
An instruction for scanning is sent from the CPU 104 to the scanner 2 via the bus SW 103, I/O bus 106, a video input I/F 108, and a scanner image processing unit 113.
Multivalue image data read out from an original by the scanner 2 is sent to the scanner image processing unit 113, converted into a binary image, and stored into a RAM 101 via the video input I/F 108, a video bus 105, and the bus SW 103 (S402). The scan image stored in the RAM 101 is compressed by a compression/decompression unit 107 via the bus SW 103 and video bus 105 and stored into the RAM 101 via the video bus 105 and bus SW 103 (S403).
The compression scan image data stored in the RAM 101 is stored onto an HD 116 via the bus SW 103, I/O bus 106, PCIcont 112, PCI bus 4, and HDcont 115 (S404). The compression scan image data stored onto the HD 116 is stored into the RAM 101 via the HDcont 115, PCI bus 4, PCIcont 112, I/O bus 106, and bus SW 103 (S405).
The compression scan image data which has been read out from the HD 116 and stored in the RAM 101 is decompressed by the compression/decompression unit 107 via the bus SW 103 and video bus 105 and stored into the RAM 101 via the video bus 105 and bus SW 103 (S406). The video data which has been decompressed by the compression/decompression unit 107 and stored in the RAM 101 is printed by the printer 3 via the bus SW 103, I/O bus 106, a video output I/F 109, and a printer image processing unit 114 (S407).
A flow for a network PDL print will now be described with reference to FIG. 5. When the printing operation is executed by a PC (not shown) connected to a network 111 (S501), PDL print data is stored into the RAM 101 via the network 111, an LANcont 110, the I/O bus 106, and bus SW 103. The data stored in the RAM 101 is successively stored onto the HD 116 via the bus SW 103, I/O bus 106, PCIcont 112, PCI bus 4, and HDcont 115 (S502).
The PDL data stored onto the HD 116 is fetched into the RAM 101 via the HDcont 115, PCI bus 4, PCIcont 112, I/O bus 106, and bus SW 103, developed into PDL codes by a process of the CPU 104, and fetched into the RAM 101.
If the apparatus has the external PDL accelerator, the PDL codes in the RAM 101 are simultaneously transferred to a RAM 121 via the bus SW 103, I/O bus 106, PCIcont 112, PCI bus 4, and a PCIcont 119 of the PDL accelerator 6 (S503).
In the PDL accelerator 6, the PDL codes in the RAM 121 are developed into bit map data by a CPU 120 and stored into the RAM 121 (S504). The bit map data stored in the RAM 121 is transferred to the RAM 101 via the PCIcont 119, PCI bus 4, PCIcont 112, I/O bus 106, and bus SW 103 (S505).
The bit map data in the RAM 101 is compressed by the compression/decompression unit 107 via the bus SW 103 and video bus 105 and stored into the RAM 101 via the video bus 105 and bus SW 103 (S506). The compression bit map data stored in the RAM 101 is stored onto the HD 116 via the bus SW 103, I/O bus 106, PCIcont 112, PCI bus 4, and HDcont 115 (S507). The compression bit map data stored onto the HD 116 is stored into the RAM 101 via the HDcont 115, PCI bus 4, PCIcont 112, I/O bus 106, and bus SW 103 (S508). The compression bit map data which has been read out from the HD 116 and stored in the RAM 101 is decompressed by the compression/decompression unit 107 via the bus SW 103 and video bus 105 and stored into the RAM 101 via the video bus 105 and bus SW 103 (S509).
The bit map data which has been decompressed by the compression/decompression unit 107 and stored in the RAM 101 is printed by the printer 3 via the bus SW 103, I/O bus 106, video output I/F 109, and printer image processing unit 114 (S510).
FIG. 6 shows a timing chart for the electronic sort and copy and the PDL print. In the diagram, “scan” shows a manner in which data of “Copy 1” and “Copy n” is stored into the RAM 101 at repetitive timing of Ts. “Compress and write onto HD” shows a processing time which is necessary from the start of the compression of the scan data after completion of the storage of the data of “Copy 1” and “Copy n” into the RAM 101 until the completion of the writing of the data onto the HD 116. “Read out HD and decompress” shows a time which is necessary from the start of reading of the data from the HD 116 until the data which was read out and compressed is decompressed and completely developed into the RAM 101. “Print” shows a period of time during which the data developed on the RAM 101 is outputted to the printer.
“Transfer PDL data” shows a period of time during which the bit map data obtained by analyzing and developing the PDL data is transferred from the PDL accelerator 6 to the MFP controller. “Compress PDL data and write onto HD” shows a time which is necessary until the MFP controller compresses the transferred bit map data and writes it onto the HD. In this instance, each of the foregoing items excluding “scan” and “print” denotes a process which is executed via the PCI bus 4, I/O bus 106, and the like in FIG. 3. FIG. 6, therefore, shows a case where “transfer PDL data”, that is, the data transfer from the PDL accelerator 6 of the bit map data of an amount that is much larger than that of the PDL data to the MFP controller 1 is started at the timing of completion of the process of “Read out HD and decompress”.
As shown in FIG. 6, in case of only the electronic sort and copy, the process for compressing the scan image, the process for storing the data onto the HD, the process for reading out the data from the HD, and the decompressing process can be sequentially executed for a scanning period of one page, thereby realizing the electronic sorting and copying processes without loss of time.
As shown in FIG. 6, however, if the execution of the PDL print is controlled during the electronic sort and copy, that is, if two processes compete, the total time necessary for the processes of “compress and write onto HD”, “read out HD and decompress”, “transfer PDL data”, and “compress PDL data and write onto HD” does not lie within a scanning period of time of one page. In the example shown in FIG. 6, such a total time is equal to (Ts+α) as compared with a scanning period Ts. This is because the amount of analyzed and developed PDL data, that is, the amount of bit map data is very large, so that it takes a long time for the data transfer.
This means that during the electronic sort and copy, the operations such that after completion of the reception of the data obtained by developing the PDL, the data is compressed and immediately stored onto the HD cannot be executed. In this case, after completion of the electronic sort and copy, when the data obtained by developing the PDL is compressed and stored onto the HD, or in the case where the electronic sort and copy processes are preferentially executed, a processing speed of the PDL print deteriorates as compared with that in case of executing a single process.
If there is a relation of the processing times between the electronic sort and copy and the PDL print as shown in FIG. 6 and the data to be PDL-printed is data of a heavy process, there is a case where it takes time to print the first page of the PDL or a case where the periodic print output is interrupted halfway. On the user's side, there is a problem such that the total time that is required for printing increases, so that loss is caused on business.